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The high performance of the PIC12C5XX family can be attributed to a number of architectural features commonly found in RISC microprocessors.

To begin with, the PIC12C5XX uses a Harvard architecture in which program and data are accessed on separate buses.

This improves bandwidth over traditional von Neumann architecture where program and data are fetched on the same bus. Separating program and data memory further allows instructions to be sized differently than the 8-bit wide data word.

Instruction opcodes are 12-bits wide making it possible to have all single word instructions.

A 12-bit wide program memory access bus fetches a 12-bit instruction in a single cycle. A two-stage pipeline overlaps fetch and execution of instructions. Consequently, all instructions (33) execute in a single cycle (1µs @ 4MHz) except for program branches.

The table below lists program memory (EPROM), data memory (RAM), ROM memory, and non-volatile (EEPROM) for each device. The PIC12C5XX device contains an 8-bit ALU and working register. The ALU is a general purpose arithmetic unit.

It performs arithmetic and Boolean functions between data in the working register and any register file.

The ALU is 8-bits wide and capable of addition, subtraction, shift and logical operations. Unless otherwise mentioned, arithmetic operations are two’s complement in nature. In two-operand instructions, typically one operand is the W (working) register.

The other operand is either a file register or an immediate constant. In single operand instructions, the operand is either the W register or a file register.

The register is an 8-bit working register used for ALU operations. It is not an addressable register. Depending on the instruction executed, the ALU may affect the values of the Carry (C), Digit Carry (DC), and Zero (Z) bits in the STATUS register.

Th e C and DC bits operate as a borrow and digit borrow out bit, respectively, in subtraction. See theSUBWF andADDWF instructions for examples. A simplified block diagram is shown in Figure 3-1, with the corresponding device pins described in Table 3-1.

The PIC12C5XX can directly or indirectly address its register files and data memory after RECOVER MCU. All special function registers including the program counter are mapped in the data memory.

The PIC12C5XX has a highly orthogonal (symmetrical) instruction set that makes it possible to carry out any operation on any register using any addressing mode.

This symmetrical nature and lack of ‘special optimal situations’ make programming with the PIC12C5XX simple yet efficient. In addition, the learning curve is reduced significantly.