Reverse Engineering DSP MCU TMS320F28034 Flash Memory is a process to unlock microprocessor tms320f28034 flash protection and then readout the embedded binary from its processor memory;
The 280x devices are full static CMOS devices. Three low-power modes are provided:
IDLE:
Place CPU into low-power mode. Peripheral clocks may be turned off selectively and only those peripherals that need to function during IDLE are left operating. An enabled interrupt from an active peripheral or the watchdog timer will wake the processor from IDLE mode in order to carry out the task of reverse engineering tms320f28016 microprocessor flash code.
STANDBY:
Turns off clock to CPU and peripherals. This mode leaves the oscillator and PLL functional. An external interrupt event will wake the processor and the peripherals. Execution begins on the next valid cycle after detection of the interrupt event
HALT:
Turns off the internal oscillator. This mode basically shuts down the device and places it in the lowest possible power consumption mode. A reset or external signal can wake the device from this mode.
The 280x segregate peripherals into three sections. The mapping of peripherals is as follows:
PF0: | PIE: Flash: | PIE Interrupt Enable and Control Registers Plus PIE Vector Table Flash Control, Programming, Erase, Verify Registers |
Timers: | CPU-Timers 0, 1, 2 Registers | |
CSM: | Code Security Module KEY Registers | |
ADC: | ADC Result Registers (dual-mapped) | |
PF1: | eCAN: | eCAN Mailbox and Control Registers |
GPIO: | GPIO MUX Configuration and Control Registers | |
ePWM: | Enhanced Pulse Width Modulator Module and Registers | |
eCAP: | Enhanced Capture Module and Registers | |
eQEP: | Enhanced Quadrature Encoder Pulse Module and Registers | |
PF2: | SYS: | System Control Registers |
SCI: | Serial Communications Interface (SCI) Control and RX/TX Registers | |
SPI: | Serial Port Interface (SPI) Control and RX/TX Registers | |
ADC: | ADC Status, Control, and Result Register | |
I2C: | Inter-Integrated Circuit Module and Registers |