clone microprocessor flash memory is a prevail technology in the industry of Electronic Product Reverse Engineering, Relevant protection mechanism has been established to protect microprocessor flash memory clone in the world. Asynchronous logic is a recently developed clone microprocessor flash memory protection technology, it has been introduced after the synchronous dual line logic promotion.

As we all know, traditional digital logic use only one clock to synchronize the operation. But accompany with acceleration of clock rate, this synchronized operation becomes more and more complicate. Due to this reason, it give rise to the self-synchronized or asynchronous design without the clock.

There is one way is to use random technology on the data line to prevent clone microprocessor flash memory, in the dual line logic, signal zero and one is not high and low electrical press on single line anymore, but a pair of signal combination on the line. Such as zero could probably LH, while one is probably HL, when in the application of synchronous circuit, LL signal means motionless.

The main drawback of all these simple arrangement is they are very fragile: un-wanted HH status could emerge due to the circuit disadvantage when clone microprocessor flash memory.

Self-asynchronous design can be used to fend off the clock noise microprocessor flash memory cloneing. If the serial interface need clock, it is relatively easier to separate the clock from sensitive circuit. Power supply noise microprocessor flash memory clone can seldom work on the asynchronous circuit, however, for those microprocessor flash memory with eeprom as memorizer won’t be protected and could be cloned.

Dual Line design can obtain the alerting signals from sensor modification reliably, and constrain the operation of microprocessor flash memory. The final result could be the deletion of sensitive data from microprocessor flash memory and trigger the alert, it can prevent the flaw injection microprocessor flash memory clone to gain success, microprocessor flash memory cloneer should inject two failure status simultaneously and make the status of transmitting line from LH switch to HL, which can cause the transmitting status enter into HH immediately and trigger the alert right away.

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